AAXE™ hardware operating system (O/S) delivers high performance, scalable and adaptable computing. AAXE O/S works upwards from the board level through application development performing efficient, full potential heterogeneous computing. transcends limitations of traditional single and multi-core microprocessor system architectures.

  • AAXE enables dynamic, real-time reconfiguration of Field Programmable Gate Array (FPGA) and Peripheral Component Interconnect (PCI) architectures. We say, "Imagine a FPGA the size of a pizza box!" That’s power.
  • AAXE streams application functions at wire-line processing speeds. Goodbye 3.3GHz clockspeed limitations.
  • AAXE deploys processing to all your system-registered board level hardware as resources become available, true parallel optimization. Efficiency is our mission.
  • AAXE offers distributed control plane access for unprecedented system management. Agile and precise.
  • AAXE increases operations per unit of energy. More work, fewer Watts, no question. Sustainable.
  • AAXE decouples hardware specific design choices from the software development thread. Specialized. Directed.
  • AAXE presents application developers a unified machine image extending aggregation beyond the chip level to the board and system levels. Big Iron compute power.
  • AAXE uses Verilog, standardized IEEE 1364 hardware description language (HDL), VHDL, standardized IEEE 1076 hardware description language (HDL), or OpenCL, to model applications. Non-proprietary and off the shelf.
  • AAXE is scalable. Need more speed? Add more AAXE instances. Simple.

Powerful, fast, efficient, modular, agile, precise, sustainable, specialized and directed, big ironish, off the shelf, simple. AAXE

AAXE hardware operating system answers the challenge of next generation computational limits. Today’s system designers are looking beyond multi-threaded core architectures. Application speeds for multicore don’t scale linearly with the number of cores. There are other stress points in traditional microprocessor architectures:

• The von Neumann bottleneck limits multi-core processing architecture. Namely, dependency-at-a-time data fetch instructions and data operations limit speed across a common bus. They can’t occur simultaneously. AAXE solves that.

• Amdahl's Law states that serial segments of an application limit any potential for parallel cores to accelerate an application. AAXE solves that.

  • Application programming for multi-core microprocessors increasingly demands guru-level expertise to take full advantage of next-generation capabilities. Complexity frustrates rapid prototyping and deployment. Complex development takes too long, is too risky and costs too much. AAXE solves that.
  • General purpose FPGA architecture may be costly to integrate, restrict functional range, or lack application granularity. AAXE solves that.
  • General purpose Graphics Processing Unit (GPGPU) components frustrate heterogeneous system designers targeting generic application domains. Applications with intricate dependencies run inefficiently on a GPGPU platform, consuming excessive power per usable calculated result. AAXE solves that.


AAXE requires less hardware resulting in spectacular power savings when compared to microprocessors running comparable application functionality.